Energy efficient FFT implementation through stage skipping and merging

Namita Sharma, P. Panda, F. Catthoor
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Abstract

Fast Fourier Transform (FFT) implementation is characterized by a large number of memory access operations. For FFTs with a significant number of zeros at the input, commonly found in broadcasting standards, we propose energy optimizations leading to reduced memory accesses. We also present an energy estimate based technique for selecting an energy-efficient Register File size, for implementing FFT in both Single Instruction Multiple Data (SIMD) and non-SIMD architectures. Experimental results for different configurations show a variation of 18.5% to 58.5% in energy consumption across the best and worst choices of RF size in the considered range. The proposed implementation is up to 92% more energy efficient than both the non-optimized and pruned radix-2 FFT implementations.
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通过阶段跳过和合并实现节能FFT
快速傅里叶变换(FFT)实现的特点是大量的内存访问操作。对于在输入处具有大量零的fft,通常在广播标准中发现,我们建议进行能量优化,从而减少内存访问。我们还提出了一种基于能量估计的技术,用于选择节能的寄存器文件大小,用于在单指令多数据(SIMD)和非SIMD架构中实现FFT。不同配置的实验结果表明,在考虑的范围内,最佳和最差的射频尺寸选择的能耗变化为18.5%至58.5%。所提出的实现比非优化和修剪基数2的FFT实现的能源效率高出92%。
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