Experiences teaching design automation in the introductory level course

Yong Y. Li
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引用次数: 1

Abstract

"Logic and Digital Design" is an introductory level course for electrical engineering students at the Department of Electrical Engineering, University of Wisconsin-Platteville. This paper describes the development of using design automation tools in the course. Since Fall 1993, a realistic design environment has been created. Through laboratory work and a comprehensive final project, not only students have learned fundamental knowledge of the logic and digital design, but also they have used the extensive facilities in the laboratory to undertake the design and integration of state machine. In the course, several tools have been introduced gradually, which include schematic capture tools (OrCAD, MAX+PLUS II), simulation tool (SYNOPSYS, MAX+PLUS II) hardware design language and synthesis (AHDL, Programmer). At the end of the course, each student is required to design, test and implement and demonstrate his/her own state machine using CPLD devices (ALTERA). This paper also describes the accomplishments of the student projects during the academic year of 1996.
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有设计自动化入门课程教学经验
“逻辑和数字设计”是威斯康星大学普拉特维尔分校电气工程系电气工程专业学生的入门级课程。本文描述了在课程中使用设计自动化工具的发展。自1993年秋季以来,创造了一个现实的设计环境。通过实验室工作和综合的期末设计,学生不仅学习了逻辑和数字设计的基础知识,而且还利用实验室丰富的设施进行了状态机的设计和集成。在课程中,逐步介绍了几种工具,包括原理图捕获工具(OrCAD, MAX+PLUS II),仿真工具(SYNOPSYS, MAX+PLUS II),硬件设计语言和综合(AHDL, Programmer)。在课程结束时,每个学生都需要使用CPLD器件(ALTERA)设计,测试和实现并演示他/她自己的状态机。本文还介绍了1996学年学生项目的成果。
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