Processing And DC Performance Of Self-Aligned GaAs Gate SISFET

Abstract

=aligned GaAs gate enhancement mode SISFETs with the highest intrinsic g, of 350 mS/mm and 440 mS/mm, and I of 270 mA/mm and 450 mA/mm at 300K an8 77K respectively were obtained on 055 pm gate length devices. Electron velocity enhancement effects were seen through transconductance dependence on gate lenght. The effective channel length in this self-aligned structure was found to be defined by SI+ implanted source and drain regions. The extrapolated p at 77K was > 150,000 cm-'/V.sec and contributed to excellent channel conductance shown firough low knee voltage and low channel resistance which is lower than 1/3 of the total S-D on resistance. The near zero built-in V was obtained due to almost symmetric layer structure, good thermal stability of undoped structure and proper RTA control. The I-V distortion at 77K was found to be a pure geometric effect resulting from angled Si + implant and did not occur in non-angled implant due to undoped structure, unlike the I, collapse in MODFET which is caused by traps. The SISFETs show a large charge modulation capability: at Vg = 0.7V, NS 2 1012/cm2, fast turn on characteristics, and high potential in being used in higk speed logic circuits. These features also made SISFET potential in obtaining high frequency microwave performance. Furthermore intrinsic NDR of SISFETs was found by real space transfer through hot electron injection under certain bias conditions and this indicates SISFETs might have potential in other interesting microwave applications which is still under study. I nt rod u ct io n