Synchronizing an IEEE 1588 slave clock over both paths of a redundant Ethernet system

Abstract

It is expected that there is only a single active path between an IEEE 1588 master and slave. This is based on the general operation scenario of an Ethernet network, which depends on a setup without network loops. In a redundant Ethernet system based on the Parallel Redundancy Protocol (PRP) or the High availability Seamless Redundancy protocol (HSR), this expectation is skewed. There are two simultaneously active paths between an IEEE 1588 master and slave clock in these systems. Selecting the better path for synchronization, by applying additional qualification criteria in the best master clock algorithm, e.g., the correction field, is a common solution for this problem. This paper proposes a solution to use both paths simultaneously for synchronization to provide a seamless switchover, if one path fails.