{"title":"Fully monolithic single-sideband upconverter mixer with sideband selection","authors":"Min Wang, C. Saavedra","doi":"10.1109/MWSYM.2011.5972562","DOIUrl":null,"url":null,"abstract":"A single-sideband upconverter mixer with sideband selection capability is presented. Sideband selection is accomplished by inverting the polarity of either the I or Q differential IF signals into the upconverter by means of a switch network. The mixer operates at an LO frequency of 5 GHz and an IF of 100 MHz, and thus it produces an upper sideband at 5.1 GHz and a lower sideband at 4.9 GHz. Experimental results show that the mixer has a conversion gain of over 12 dB and that its IP1dB is −12 dBm and its IIP3 is −5 dBm. The OP1dB and OIP3 of the upconverter are 0 dBm and +6.5 dBm, respectively. The chip was fabricated using a standard 130 nm CMOS process, it consumes a total of 26 mW of dc power and the circuit core occupies an area of 0.49 mm2.","PeriodicalId":294862,"journal":{"name":"2011 IEEE MTT-S International Microwave Symposium","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-06-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE MTT-S International Microwave Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSYM.2011.5972562","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
A single-sideband upconverter mixer with sideband selection capability is presented. Sideband selection is accomplished by inverting the polarity of either the I or Q differential IF signals into the upconverter by means of a switch network. The mixer operates at an LO frequency of 5 GHz and an IF of 100 MHz, and thus it produces an upper sideband at 5.1 GHz and a lower sideband at 4.9 GHz. Experimental results show that the mixer has a conversion gain of over 12 dB and that its IP1dB is −12 dBm and its IIP3 is −5 dBm. The OP1dB and OIP3 of the upconverter are 0 dBm and +6.5 dBm, respectively. The chip was fabricated using a standard 130 nm CMOS process, it consumes a total of 26 mW of dc power and the circuit core occupies an area of 0.49 mm2.