{"title":"A linearized power amplifier MMIC for 3.5 V battery operated wide-band CDMA handsets","authors":"G. Hau, T. B. Nishimura, N. Iwata","doi":"10.1109/MWSYM.2000.862260","DOIUrl":null,"url":null,"abstract":"This paper presents a linearized power amplifier (PA) MMIC developed for 1.95 GHz wide-band CDMA handsets. Predistortion linearization was employed to compensate the nonlinearities of a PA, achieving high efficiency, high linearity signal amplification operated at 3.5 V supply voltage. To maintain a compact design, the predistorter was integrated with the PA onto a single MMIC chip. After linearization, the output power (P/sub out/) and power added efficiency (PAE) of the PA MMIC improve significantly from 28.0 dBm and 40.0% to 28.8 dBm and 44.5%, respectively, measured at -38 dBc adjacent channel leakage power ratio (ACPR) with a 3.84 Mcps hybrid phase shift keying signal. By combining with bias control, the linearized PA MMIC also demonstrates an excellent low P/sub out/ (13 dBm) performance, achieving a PAE of 24.0% at the same ACPR criteria.","PeriodicalId":149404,"journal":{"name":"2000 IEEE MTT-S International Microwave Symposium Digest (Cat. No.00CH37017)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2000-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 IEEE MTT-S International Microwave Symposium Digest (Cat. No.00CH37017)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSYM.2000.862260","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 11
Abstract
This paper presents a linearized power amplifier (PA) MMIC developed for 1.95 GHz wide-band CDMA handsets. Predistortion linearization was employed to compensate the nonlinearities of a PA, achieving high efficiency, high linearity signal amplification operated at 3.5 V supply voltage. To maintain a compact design, the predistorter was integrated with the PA onto a single MMIC chip. After linearization, the output power (P/sub out/) and power added efficiency (PAE) of the PA MMIC improve significantly from 28.0 dBm and 40.0% to 28.8 dBm and 44.5%, respectively, measured at -38 dBc adjacent channel leakage power ratio (ACPR) with a 3.84 Mcps hybrid phase shift keying signal. By combining with bias control, the linearized PA MMIC also demonstrates an excellent low P/sub out/ (13 dBm) performance, achieving a PAE of 24.0% at the same ACPR criteria.