M. N. Isa, S. Murad, R. C. Ismail, M. I. Ahmad, A. B. Jambek, M. K. Md Kamil
{"title":"An efficient processing element architecture for pairwise sequence alignment","authors":"M. N. Isa, S. Murad, R. C. Ismail, M. I. Ahmad, A. B. Jambek, M. K. Md Kamil","doi":"10.1109/ICED.2014.7015850","DOIUrl":null,"url":null,"abstract":"One of the most challenging tasks in sequence alignment is its repetitive and time-consuming alignment matrix computations. Alignment matrix scores are crucial for identifying regions of homology between biological sequences. In this paper, a parametrizable and area efficient processing element (PE) architecture for performing biological sequence alignment task especially for pairwise biological sequence alignment is designed. Its corresponding PE architecture realization was prototyped on Xilinx FPGA platform. FPGA has been chosen as it able to realize an array of systolic array-based PEs. Execution of the proposed parameterizable PE architecture have been conducted and comparison results have shown that the systolic arrays with parameterizable PE has gained at least 15x speed-up as compared to the well-known SSEARCH 35 solution.","PeriodicalId":143806,"journal":{"name":"2014 2nd International Conference on Electronic Design (ICED)","volume":"158 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 2nd International Conference on Electronic Design (ICED)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICED.2014.7015850","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
One of the most challenging tasks in sequence alignment is its repetitive and time-consuming alignment matrix computations. Alignment matrix scores are crucial for identifying regions of homology between biological sequences. In this paper, a parametrizable and area efficient processing element (PE) architecture for performing biological sequence alignment task especially for pairwise biological sequence alignment is designed. Its corresponding PE architecture realization was prototyped on Xilinx FPGA platform. FPGA has been chosen as it able to realize an array of systolic array-based PEs. Execution of the proposed parameterizable PE architecture have been conducted and comparison results have shown that the systolic arrays with parameterizable PE has gained at least 15x speed-up as compared to the well-known SSEARCH 35 solution.