{"title":"DigitalJS","authors":"Marek Materzok","doi":"10.1145/3375258.3375272","DOIUrl":null,"url":null,"abstract":"This paper describes a visual circuit simulator tool designed for teaching students digital circuit design. The tool runs in the browser and is simple to use. It allows to visualize the synthesized circuit generated from Verilog/SystemVerilog code and interact with it.","PeriodicalId":202521,"journal":{"name":"Proceedings of the 8th Computer Science Education Research Conference on ZZZ","volume":"34 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 8th Computer Science Education Research Conference on ZZZ","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/3375258.3375272","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
This paper describes a visual circuit simulator tool designed for teaching students digital circuit design. The tool runs in the browser and is simple to use. It allows to visualize the synthesized circuit generated from Verilog/SystemVerilog code and interact with it.
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