A 290µA, 3.2MHz 4-bit phase ADC for constant envelope, ultra-low power radio

B. Banerjee, C. Enz, E. Le Roux
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引用次数: 9

Abstract

This paper presents an implemented 4-bit phase ADC circuit. It introduces a model to calculate its dynamic range considering second order effects including non-linearity and offsets. The study also encompasses the phase resolution and validates the model with measurement results from the implemented chip. Our analysis shows that the phase ADC is extremely robust against circuit non-idealities and provides higher dynamic range compared to traditional amplitude ADCs while consuming lower power.
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一个290µA, 3.2MHz 4位相位ADC,用于恒定包络,超低功率无线电
本文提出了一种实现的4位相位ADC电路。介绍了一种考虑非线性和偏移等二阶效应的动态范围计算模型。该研究还包括相位分辨率,并使用所实现芯片的测量结果验证模型。我们的分析表明,相位ADC对电路非理想性具有极强的鲁棒性,与传统幅度ADC相比,它提供了更高的动态范围,同时功耗更低。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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