FPGA optimization of convolution-based 2D filtering processor for image processing

Abstract

The Bachet weight decomposition method is used to design a new 2D convolution-based filter, specifically aimed to image processing. The filter substitutes multipliers with simplified floating point adders to emulate standard 32 bit floating point multipliers, by using a set of pre-computed coefficients. A careful organization of the memory, together with the optimized distribution of the related hard macros in the FPGA fabric, allow the elaboration of the data in raster scan order, as those directly provided by an acquisition source, without the need of frame buffers or additional aligning circuitry. The proposed design achieves a state-of-the-art critical path delay of 4.7 ns on a Xilinx Virtex 7 FPGA.