High Gain Miller Compensated OpAmp with High Supply Rejection in 180 nm CMOS Technology

Avishisht Kumar, P. Kumari, Imran Khan
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引用次数: 1

Abstract

In this paper the advantages of high supply rejection phenomenon in Opamp applications with Miller Compensation is evaluated. The operational amplifier is designed with 180 nm CMOS process ideally for temperature range of 25°C to 300°C. The Opamp is designed to have a DC gain of about 70dB and phase margin of 60°. The Miller compensation technique showed a reduction in the compensation capacitor size, means a smaller design area and improvement in the phase margin from the LHP zero. The operational amplifier has been designed and simulated Tanner EDA (SPICE Platform) in 180nm process technology.
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180nm CMOS技术高增益米勒补偿高电源抑制运算放大器
本文评价了采用米勒补偿的Opamp应用中高电源抑制现象的优点。该运算放大器采用180 nm CMOS工艺设计,理想温度范围为25°C至300°C。该Opamp的直流增益约为70dB,相位裕度为60°。米勒补偿技术显示补偿电容器尺寸的减小,意味着更小的设计面积和从LHP零点开始的相位裕度的改善。设计并仿真了180nm制程的Tanner EDA (SPICE Platform)运算放大器。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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