The effects of process variations on the performance of MCM-D interconnects

Abstract

The performance of thin film interconnects is dependent upon successful interaction between design and the fabrication process. The functional verification of process tolerances to achieve the originally simulated design requirements is addressed. Variational analysis results about the nominal design value are presented and compared with initial simulation results. Interconnect capacitance and impedance variations as a function of conductor and dielectric geometry are shown. The analysis shows that the process is capable of giving an impedance within 10% of the nominal design value.<>