Small Area Footprint FPGA Architecture for Approximate atan2(a, b) Algorithm

B. Kumar, K. Sarawadekar
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Abstract

Arctangent or inverse tangent function has numerous applications like gradient-based feature extraction, phase noise determination, range rate measurement etc. This paper presents a small area footprint hardware architecture for computing the arctangent of a complex number. The proposed method uses numerical approximation and LUTs used to improve the accuracy of the results obtained. Single-precision floating-point representation is used to implement the proposed design and the results demonstrate very good accuracy with an error of about ±0.0004 radian with $256\times 32$ bits memory size. The proposed architecture is implemented on Nexys4 DDR FPGA board using Verilog and it operates at 19.8 MHz. Integrated Logic Analyzer (ILA) is used to debug and validate the proposed design. Further, it is observed that results obtained with the proposed design are in agreement with the Matlab simulation results.
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近似atan2(a, b)算法的小面积FPGA架构
正切或反切函数有许多应用,如基于梯度的特征提取,相位噪声测定,距离率测量等。本文提出了一种用于计算复数的arctan的小面积硬件结构。该方法采用数值逼近和lut相结合的方法来提高所得结果的精度。采用单精度浮点表示来实现所提出的设计,结果表明精度非常好,误差约为±0.0004弧度,内存大小为$256\乘以32$ bits。该架构采用Verilog在Nexys4 DDR FPGA板上实现,工作频率为19.8 MHz。利用集成逻辑分析仪(ILA)对所提出的设计进行调试和验证。此外,所提出的设计结果与Matlab仿真结果一致。
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