A. Thiede, Z. Lao, H. Lienhart, M. Sedler, J. Seibel, J. Hornung, J. Schneider, G. Kaufel, W. Bronner, K. Kohler, T. Jakobus, M. Schlechtweg
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引用次数: 1
Abstract
A 16/spl times/16 bit parallel multiplier based on a 26 k sea-of-gates has been fabricated successfully to demonstrate the LSI capability of our mixed signal IC technology including pseudomorphic T-gate HEMTs for high speed as well as three levels of gold metallization for high integration complexity. To prove the high speed performance, a digital dynamic frequency divider operating in a frequency band from about 36 GHz up to almost 60 GHz has been realised.
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