A Novel Task-to-Processor Assignment Approach for Optimal Multiprocessor Real-Time Scheduling

Doan Duy, Kiyofumi Tanaka
{"title":"A Novel Task-to-Processor Assignment Approach for Optimal Multiprocessor Real-Time Scheduling","authors":"Doan Duy, Kiyofumi Tanaka","doi":"10.1109/MCSoC2018.2018.00028","DOIUrl":null,"url":null,"abstract":"Recent decades have recognized the popularization of multiprocessor architectures in real-time embedded systems. Real-time task scheduling in such systems has become a challenging problem as a result. In this paper, we are presenting an optimal scheduling algorithm, which can successfully schedule any task sets with no deadline miss if the total utilization of tasks does not exceed the capacity of the involved system. The proposed algorithm called LLA introduces a so-called fixed task-scheduling plan for every time interval that is defined as the time period between two consecutive job releases. At the beginning of each interval, LAA makes the scheduling plan by predicting tasks' requested amount of execution time within the interval and then arranging these amounts to processors appropriately respecting to requirements of scheduling. By this approach, LAA can extremely reduce the number of scheduler invocations to the number of job releases. Furthermore, simulation results show that our algorithm has lower time complexity while retaining the schedulability, task preemption, and task migration competitive to the existing optimal scheduling algorithms.","PeriodicalId":413836,"journal":{"name":"2018 IEEE 12th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)","volume":"65 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE 12th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MCSoC2018.2018.00028","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

Abstract

Recent decades have recognized the popularization of multiprocessor architectures in real-time embedded systems. Real-time task scheduling in such systems has become a challenging problem as a result. In this paper, we are presenting an optimal scheduling algorithm, which can successfully schedule any task sets with no deadline miss if the total utilization of tasks does not exceed the capacity of the involved system. The proposed algorithm called LLA introduces a so-called fixed task-scheduling plan for every time interval that is defined as the time period between two consecutive job releases. At the beginning of each interval, LAA makes the scheduling plan by predicting tasks' requested amount of execution time within the interval and then arranging these amounts to processors appropriately respecting to requirements of scheduling. By this approach, LAA can extremely reduce the number of scheduler invocations to the number of job releases. Furthermore, simulation results show that our algorithm has lower time complexity while retaining the schedulability, task preemption, and task migration competitive to the existing optimal scheduling algorithms.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
一种新的多处理机实时调度任务-处理机分配方法
近几十年来,多处理器架构在实时嵌入式系统中的普及得到了认可。因此,实时任务调度已成为一个具有挑战性的问题。在本文中,我们提出了一种最优调度算法,该算法可以在任务的总利用率不超过系统容量的情况下,成功地调度任何任务集而不错过截止日期。提出的LLA算法为每个时间间隔(定义为两个连续作业释放之间的时间段)引入了所谓的固定任务调度计划。在每个间隔的开始,LAA通过预测任务在间隔内请求的执行时间量,然后根据调度需求将这些量适当地安排给处理器,从而制定调度计划。通过这种方法,LAA可以将调度器调用的数量大大减少到作业发布的数量。仿真结果表明,该算法具有较低的时间复杂度,同时保持了与现有最优调度算法相比的可调度性、任务抢占性和任务迁移性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Design and Evaluation of a Configurable Hardware Merge Sorter for Various Output Records On-Line Cost-Aware Workflow Allocation in Heterogeneous Computing Environments Simplified Quadcopter Simulation Model for Spike-Based Hardware PID Controller using SystemC-AMS Search Space Reduction for Parameter Tuning of a Tsunami Simulation on the Intel Knights Landing Processor Unifying Wire and Time Scheduling for Highlevel Synthesis
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1