Fast FPGA prototyping of a multipath fading channel emulator via high-level design

Jeng-Kuang Hwang, Kuei-Horng Lin, Jeng-Da Li, Juinn-Horng Deng
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引用次数: 12

Abstract

A baseband multipath fading channel emulator is implemented on Xilinx XtremeDSP FPGA platform through high-level design. Without any RTL coding, fast prototyping of important modules can be done in the form of high-level Simulink models and Xilinx System Generator IP blocks. These modules include the white Gaussian noise generator (WGNG), Doppler filter, direct digital frequency synthesizer (DDFS), multi-rate interpolators, and multipath signal generator. Since all modules are designed in high level, the system parameters and configuration can be easily changed as desired. The FPGA emulator have been tested at a sampling rate of 30 Msps, and all the measured signals are well coincides with the simulation results, thus verifying the correctness of the design.
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通过高级设计的多径衰落信道仿真器的快速FPGA原型
通过高层设计,在Xilinx XtremeDSP FPGA平台上实现了一个基带多径衰落信道仿真器。无需任何RTL编码,重要模块的快速原型可以以高级Simulink模型和Xilinx System Generator IP块的形式完成。这些模块包括高斯白噪声发生器(WGNG),多普勒滤波器,直接数字频率合成器(DDFS),多速率插值器和多径信号发生器。由于所有模块都是高层次设计,系统参数和配置可以很容易地根据需要进行更改。FPGA仿真器在30 Msps的采样率下进行了测试,所有测量信号与仿真结果吻合良好,从而验证了设计的正确性。
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