Jeng-Kuang Hwang, Kuei-Horng Lin, Jeng-Da Li, Juinn-Horng Deng
{"title":"Fast FPGA prototyping of a multipath fading channel emulator via high-level design","authors":"Jeng-Kuang Hwang, Kuei-Horng Lin, Jeng-Da Li, Juinn-Horng Deng","doi":"10.1109/ISCIT.2007.4392006","DOIUrl":null,"url":null,"abstract":"A baseband multipath fading channel emulator is implemented on Xilinx XtremeDSP FPGA platform through high-level design. Without any RTL coding, fast prototyping of important modules can be done in the form of high-level Simulink models and Xilinx System Generator IP blocks. These modules include the white Gaussian noise generator (WGNG), Doppler filter, direct digital frequency synthesizer (DDFS), multi-rate interpolators, and multipath signal generator. Since all modules are designed in high level, the system parameters and configuration can be easily changed as desired. The FPGA emulator have been tested at a sampling rate of 30 Msps, and all the measured signals are well coincides with the simulation results, thus verifying the correctness of the design.","PeriodicalId":331439,"journal":{"name":"2007 International Symposium on Communications and Information Technologies","volume":"53 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-12-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 International Symposium on Communications and Information Technologies","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCIT.2007.4392006","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12
Abstract
A baseband multipath fading channel emulator is implemented on Xilinx XtremeDSP FPGA platform through high-level design. Without any RTL coding, fast prototyping of important modules can be done in the form of high-level Simulink models and Xilinx System Generator IP blocks. These modules include the white Gaussian noise generator (WGNG), Doppler filter, direct digital frequency synthesizer (DDFS), multi-rate interpolators, and multipath signal generator. Since all modules are designed in high level, the system parameters and configuration can be easily changed as desired. The FPGA emulator have been tested at a sampling rate of 30 Msps, and all the measured signals are well coincides with the simulation results, thus verifying the correctness of the design.