{"title":"CMOS current reference generator using integrated resistors","authors":"Hosung Chun, T. Lehmann","doi":"10.1109/ICEIE.2010.5559872","DOIUrl":null,"url":null,"abstract":"A novel method is proposed that can generate a stable reference current using on-chip integrated resistors without the use of trimming. By optimally combining different types of integrated resistors, the overall resistance variability is reduced below that of the most accurate available resistor. Combining such a resistance with a band-gap reference and a temperature compensation circuit, we implement an on-chip current reference. This circuit is implemented using a standard 0.35um CMOS process with 3V power supply. Monte-Carlo simulations show a nominal reference current (1uA) from a combined resistor varies by ±11.5% over a −10°C to 70°C temperature range. This variation is reduced by a factor of two compared with using a normal resistor. The measured values of the combined resistor and the normal resistor are 1.08MΩ and 1.45MΩ, respectively. This is −10% and +20% deviation from the desired value of 1.2MΩ.","PeriodicalId":211301,"journal":{"name":"2010 International Conference on Electronics and Information Engineering","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2010-09-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"15","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 International Conference on Electronics and Information Engineering","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEIE.2010.5559872","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 15
Abstract
A novel method is proposed that can generate a stable reference current using on-chip integrated resistors without the use of trimming. By optimally combining different types of integrated resistors, the overall resistance variability is reduced below that of the most accurate available resistor. Combining such a resistance with a band-gap reference and a temperature compensation circuit, we implement an on-chip current reference. This circuit is implemented using a standard 0.35um CMOS process with 3V power supply. Monte-Carlo simulations show a nominal reference current (1uA) from a combined resistor varies by ±11.5% over a −10°C to 70°C temperature range. This variation is reduced by a factor of two compared with using a normal resistor. The measured values of the combined resistor and the normal resistor are 1.08MΩ and 1.45MΩ, respectively. This is −10% and +20% deviation from the desired value of 1.2MΩ.