Efficient algorithms for microprocessor testing

Abstract

In this paper, the authors present simple yet efficient fault detection algorithms for microprocessor systems. They propose test generation algorithms to generate test sequences. These test sequences are used by the proposed testing algorithms. The test generation algorithms are divided into two classes. The data processing unit test generator generates tests for every functional block in the ALU while the control unit test generator generates tests for fault detection in instruction and register decoding, buses, and registers. The authors show that the major advantage of the test generation algorithm for the data processing unit is that it ignores the implementation details and thus it can be used for a wide spectrum of technologies. They also show analytically that the running time of the control unit test algorithm is in O(n) where n is the number of instructions. The simulation techniques used and the experimental results obtained are presented. The concept of functionality tests has been strictly maintained. The simulation results suggest that the technique is independent of the implementation. This technique can be easily applied to larger multiprocessor systems where each processor can perform quick yet efficient tests on a subset of the microprocessors.