{"title":"A DC-invariant gain control technique for CMOS differential variable-gain low-noise amplifiers","authors":"M. Wei, Sheng-Fuh Chang, R. Negra","doi":"10.1109/NORCHIP.2010.5669481","DOIUrl":null,"url":null,"abstract":"A DC-invariant gain control technique is introduced for differential CMOS variable-gain low-noise amplifiers (VG-LNA). Such technique provides an advantage of invariant DC bias current when the RF power gain is tuned over the gain control range. Therefore, the transconductance of NMOS transistor is unchanged, which minimizes the input match detuning. Consequently, the optimal design for noise, gain and power linearity becomes easier to achieve. The implemented 0.18 µm CMOS VG-LNA shows a nearly constant DC current of 7.8±0.5 mA from a 1.5 V supply when the RF power gain is tuned from 0 to 12.3 dB at 3.5 GHz. Over this gain tuning range, the input return loss is almost unchanged around 11.5 dB. The minimum noise figure is 2.59 dB and the input-referred P1dB is −4.5 dBm corresponding to the high gain (12.3 dB) situation. The in-band gain flatness is as flat as ±0.2 dB. A very high FOM of 20.6 is obtained.","PeriodicalId":292342,"journal":{"name":"NORCHIP 2010","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"NORCHIP 2010","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NORCHIP.2010.5669481","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
A DC-invariant gain control technique is introduced for differential CMOS variable-gain low-noise amplifiers (VG-LNA). Such technique provides an advantage of invariant DC bias current when the RF power gain is tuned over the gain control range. Therefore, the transconductance of NMOS transistor is unchanged, which minimizes the input match detuning. Consequently, the optimal design for noise, gain and power linearity becomes easier to achieve. The implemented 0.18 µm CMOS VG-LNA shows a nearly constant DC current of 7.8±0.5 mA from a 1.5 V supply when the RF power gain is tuned from 0 to 12.3 dB at 3.5 GHz. Over this gain tuning range, the input return loss is almost unchanged around 11.5 dB. The minimum noise figure is 2.59 dB and the input-referred P1dB is −4.5 dBm corresponding to the high gain (12.3 dB) situation. The in-band gain flatness is as flat as ±0.2 dB. A very high FOM of 20.6 is obtained.