Circuitry Approaches for Reducing of the Zero Level in Three-Stage CJFET Operational Amplifier

N. Prokopenko, A. Titov, A. Bugakova, V. Chumakov
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Abstract

Circuit solutions CJFET three-stage OpAmp, in which non-ideal current mirrors (CMs) with a current transfer coefficient different from unity can be used in the intermediate stage, are considered. An OpAmp architecture in which the CM and all static-setting transistor references are replaced with identical JFET uncontrolled dynamic loads is proposed. Computer modeling in the CAD LTSpice (Analog Device, USA) and mathematical analysis of the proposed OpAmps made it possible to establish that OpAmp circuits are operable at negative temperatures (up to −197°C) and when exposed to a neutron flux up to 1014 n/cm2, have high values of open-loop gain (up to 100dB) and a small systematic component of the zero bias voltage due to the OpAmp circuitry.
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降低三级CJFET运算放大器零电平的电路方法
考虑了CJFET三相运放的电路解决方案,其中在中间级可以使用具有不同单位电流传递系数的非理想电流镜。提出了一种OpAmp结构,其中CM和所有静态设置晶体管参考被相同的JFET不受控制的动态负载所取代。CAD LTSpice (Analog Device, USA)中的计算机建模和对所提出的OpAmp的数学分析使得可以确定OpAmp电路可在负温度(高达- 197°C)下工作,并且当暴露于高达1014 n/cm2的中子通量时,具有高开环增益值(高达100dB)和由于OpAmp电路而产生的零偏置电压的小系统分量。
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