Francesco Grattacaso, Daniel W. Mayer, P. D. Croce, A. Baschirotto
{"title":"Behavioural Current Limiter Optimisation","authors":"Francesco Grattacaso, Daniel W. Mayer, P. D. Croce, A. Baschirotto","doi":"10.1109/prime55000.2022.9816791","DOIUrl":null,"url":null,"abstract":"In this paper an optimisation procedure based on a Behavioural model (developed in MATLAB and Simulink) of a current limiter circuit is presented. Through the behavioural environment a coarse design optimisation is performed, while fine optimisation is later performed at transistor level. The proposed approach reduces design time compared to a full transistor level design procedure. Once the behavioural model reliably fits the transistor level behavior, any optimisation algorithm can be used in the MATLAB environment to adjust behavioural model parameters. The Current limiter case adopted as benchmark in this work demonstrates how control-loop stability can be improved through the parametric study of the loop frequency response and can be optimized by the insertion of an additional zero in the circuit transfer function.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/prime55000.2022.9816791","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
In this paper an optimisation procedure based on a Behavioural model (developed in MATLAB and Simulink) of a current limiter circuit is presented. Through the behavioural environment a coarse design optimisation is performed, while fine optimisation is later performed at transistor level. The proposed approach reduces design time compared to a full transistor level design procedure. Once the behavioural model reliably fits the transistor level behavior, any optimisation algorithm can be used in the MATLAB environment to adjust behavioural model parameters. The Current limiter case adopted as benchmark in this work demonstrates how control-loop stability can be improved through the parametric study of the loop frequency response and can be optimized by the insertion of an additional zero in the circuit transfer function.