{"title":"State-of-the-Art Ion-Implanted Low-Noise GaAs MESFET and Monolithic Amplifier","authors":"K.G. Wang, S. Wang","doi":"10.1109/MCS.1987.1114528","DOIUrl":null,"url":null,"abstract":"State-of-the-art GaAs low-noise MESFET and monolithic amplifier have been fabricated using a high yield, planar, ion-implantation process. A 0.5 µm-gate FET has achieved 1.2 dB noise figure with 8.8 dB associated gain at 12 GHz and 1.7 dB noise figure with 6.6 dB associated gain at 18 GHz. A two-stage monolithic amplifier using this FET process has achieved 1.8 dB noise figure with 23.6 dB associated gain at 9.5 GHz. The dc yield of the amplifier chips is better than 40 percent.","PeriodicalId":231710,"journal":{"name":"Microwave and Millimeter-Wave Monolithic Circuits","volume":"72 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microwave and Millimeter-Wave Monolithic Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MCS.1987.1114528","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
State-of-the-art GaAs low-noise MESFET and monolithic amplifier have been fabricated using a high yield, planar, ion-implantation process. A 0.5 µm-gate FET has achieved 1.2 dB noise figure with 8.8 dB associated gain at 12 GHz and 1.7 dB noise figure with 6.6 dB associated gain at 18 GHz. A two-stage monolithic amplifier using this FET process has achieved 1.8 dB noise figure with 23.6 dB associated gain at 9.5 GHz. The dc yield of the amplifier chips is better than 40 percent.