Instability study of high-κ Inter-Gate Dielectric stacks on hybrid floating gate flash memory

M. Zahid, R. Degraeve, L. Breuil, G. Van den bosch, J. van Houdt
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引用次数: 2

Abstract

Scaling of floating gate NAND flash will require switching from conventional control gate wrap-around cells to fully planar memory cells. Due to the low coupling ratio of these cells, a high work function metal on top of Si, together with a high-k Inter-Gate Dielectric (IGD) are required. In this work we study the performance and instability of high-κ IGD, in combination with or without Al2O3 in hybrid floating gate stack for future application in NAND flash memory and compare it to a single Al2O3 IGD. We use Post-Program and Erase discharge to study the program/erase transients as well as the instability. Results show that by replacing single Al2O3 IGD by a low thermal budget HfAlO or by a multilayer IGD combining low-κ / high-κ / low-κ where high-κ is HfO2 and low-κ is Al2O3 show strong improvement in term of program/erase level and instability, thus a good IGD/CG interface control.
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混合浮栅闪存高κ间介电堆的不稳定性研究
浮动门NAND闪存的缩放需要从传统的控制门环绕单元切换到全平面存储单元。由于这些电池的耦合比低,因此需要在Si之上使用高功功能的金属,以及高k的门间介电体(IGD)。在这项工作中,我们研究了高κ IGD的性能和不稳定性,结合或不加Al2O3在混合浮栅堆栈中用于未来的NAND闪存,并将其与单一Al2O3 IGD进行比较。我们使用程序后放电和擦除放电来研究程序/擦除瞬态和不稳定性。结果表明,用低热预算HfAlO替代单一的Al2O3 IGD或用低-κ /高-κ /低-κ(高-κ为HfO2,低-κ为Al2O3)组合的多层IGD在编程/擦除水平和不稳定性方面都有明显改善,从而实现了良好的IGD/CG界面控制。
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