{"title":"Noise and IM3 Harmonics Cancelling in Two-Stage Wideband Differential LNA","authors":"G. Amarnath, V. A, D. Sudha","doi":"10.1109/ICECCT52121.2021.9616845","DOIUrl":null,"url":null,"abstract":"This manuscript gives a cancelling technique for noise and IM3-harmonic for two-stage differential-low noise- amplifier (LNA). The noise-figure and IM3-distortion is reduced by adopting first-stage with cross-coupled boosted push-pull amplifier. The thermal noise and IM3 which are generated from first stage is cancelled by adopting second stage. The proposed low-noise-amplifier having a 15-17 dB of gain in a 0.1-2.6 GHz of wide-bandwidth by consuming 12 mW with a power supply of 1.3 V. The noise-figure is 1.5-2.6 dB, IIP3 is -3 to 0 dBm and IIP2 is 17 to 21 dBm are achieved. The proposed low-noise-amplifier is designed with 65 nm CMOS technology and 0.009 chip area.","PeriodicalId":155129,"journal":{"name":"2021 Fourth International Conference on Electrical, Computer and Communication Technologies (ICECCT)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 Fourth International Conference on Electrical, Computer and Communication Technologies (ICECCT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECCT52121.2021.9616845","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This manuscript gives a cancelling technique for noise and IM3-harmonic for two-stage differential-low noise- amplifier (LNA). The noise-figure and IM3-distortion is reduced by adopting first-stage with cross-coupled boosted push-pull amplifier. The thermal noise and IM3 which are generated from first stage is cancelled by adopting second stage. The proposed low-noise-amplifier having a 15-17 dB of gain in a 0.1-2.6 GHz of wide-bandwidth by consuming 12 mW with a power supply of 1.3 V. The noise-figure is 1.5-2.6 dB, IIP3 is -3 to 0 dBm and IIP2 is 17 to 21 dBm are achieved. The proposed low-noise-amplifier is designed with 65 nm CMOS technology and 0.009 chip area.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
