{"title":"Fast adaptive DC-DC conversion using dual-loop one-cycle control in standard digital CMOS process","authors":"D. Ma, W. Ki, C. Tsui","doi":"10.1109/ASPDAC.2004.1337638","DOIUrl":null,"url":null,"abstract":"An adaptive switching convener is presented. It adopts a dual-loop one-cycle control for right line and load regularion, while reruining f a t response and good stabilify. DC level shijiing technique eliminates the use of negative supply voltage and enables both continuous and discontinuous conduction operation. Error correction loops greatly tightens output voltage regulation. mnamic loss control funher improves the eficiency for a wide power range. The conveticr was fabricated wirh a srondard 0 . 5 d~igi ral CMOS process. The ourput voltage cm vary from 0.9V ro 2.W wirh n tracking speed of less than 14pdV for a step change of 1.6V. Maximum efliciency of 93.7% is achieved ond high efliciency above 75% is retained over an output power of l0mW to 45OmW.","PeriodicalId":426349,"journal":{"name":"ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-01-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASPDAC.2004.1337638","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
An adaptive switching convener is presented. It adopts a dual-loop one-cycle control for right line and load regularion, while reruining f a t response and good stabilify. DC level shijiing technique eliminates the use of negative supply voltage and enables both continuous and discontinuous conduction operation. Error correction loops greatly tightens output voltage regulation. mnamic loss control funher improves the eficiency for a wide power range. The conveticr was fabricated wirh a srondard 0 . 5 d~igi ral CMOS process. The ourput voltage cm vary from 0.9V ro 2.W wirh n tracking speed of less than 14pdV for a step change of 1.6V. Maximum efliciency of 93.7% is achieved ond high efliciency above 75% is retained over an output power of l0mW to 45OmW.