A novel approach to perform circuit verification using spans

Abstract

This paper presents a novel approach to perform circuit verification, particularly Design Rule Checking (DRC), using a data structure based on maximally-horizontal layout regions termed spans. The paper also discusses the characteristics required by a data structure to properly support different tasks such as graphics editing, design rule checking and circuit extraction. Most of the basic and primitive operations, necessary to support design rule checking on a circuit using a layout representation based on spans, are presented and special attention is paid to the solution of the difficult test of 45 degrees width (and also spacing) violation.