Sub-continuum thermal analysis of strained-Si/SiGe transistor scaling

Abstract

The paper focuses on the effect of nano-scale thermal phenomena on the performance of strained-Si transistors. The impact of SiGe underlayer and interface roughness on the lateral thermal conductivity of the transistor channel at room temperature is studied. The experimental data and predictions for thin Si layer thermal conductivity and the solutions of the Boltzmann transport equations (BTE) for phonon transport in the strained-Si/SiGe bilayer configuration are used to estimate the effect of self-heating on some of the key parameters of future generations of strained-Si transistors. The analysis presented shows that, due to the continuous increase of self-heating in the future, the merits of strained-Si transistors will be suppressed, unless various parameters involved in the design of these devices are revised to maintain the existing merits.