FPGA implementation of covariance lattice LPC method using burg algorithm

Abstract

Aiming at the defects of classical lattice algorithm of speech signal linear prediction analysis, an improved algorithm for hardware implementation is proposed in this paper. The recursive form and symmetry characteristic is used to transform the formula of intermediate covariance and three mean square errors, which increase the speed of hardware calculation. The improved algorithm is implementation on Virtex5 XC5VLX110T FPGA, with the maximum frequency of 100.220MHz, while the latency is 9.54us and 17195 LUTs are utilized. The functional test shows that the normalized MSE between MATLAB and FPGA is 1.12% and the reflection factors are all smaller than 1, which means the system is stable.