F.G. de Lima, M. Johann, J. Guntzel, L. Carro, R. Reis
{"title":"A tool for analysis of universal logic gates functionality","authors":"F.G. de Lima, M. Johann, J. Guntzel, L. Carro, R. Reis","doi":"10.1109/SBCCI.1999.803116","DOIUrl":null,"url":null,"abstract":"This paper presents a general methodology to determine the number of NPN functions of a programmable cell. This methodology was implemented in a tool called Programa-de-TV that is able to implement all NPN operations over n-input lookup tables. This work also shows a comparison between developed Universal Logic Gates (ULGs). One application of this technique is to select an appropriate programmable ULG to implement FPGA or Masked Programmable Architectures, according to some cost criteria. Another application of this tool is to help technology mapping into ULGs using an n-LUT mapper.","PeriodicalId":342390,"journal":{"name":"Proceedings. XII Symposium on Integrated Circuits and Systems Design (Cat. No.PR00387)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. XII Symposium on Integrated Circuits and Systems Design (Cat. No.PR00387)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SBCCI.1999.803116","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
This paper presents a general methodology to determine the number of NPN functions of a programmable cell. This methodology was implemented in a tool called Programa-de-TV that is able to implement all NPN operations over n-input lookup tables. This work also shows a comparison between developed Universal Logic Gates (ULGs). One application of this technique is to select an appropriate programmable ULG to implement FPGA or Masked Programmable Architectures, according to some cost criteria. Another application of this tool is to help technology mapping into ULGs using an n-LUT mapper.
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