Sub-micron junction termination for 1200V class devices toward CMOS process compatibility

K. Seto, Junpei Takaishi, Hironori Imaki, Masahiro Tanaka, M. Tsukuda, I. Omura
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引用次数: 3

Abstract

This study shows, for the first time, possibility of very shallow junction termination in submicron scale. The 2D-TCAD simulations unveil even 0.2μm junction depth structures are capable of blocking 1200V and usability for power devices with more than two hundreds of guard rings. Very shallow structure has robustness against diffusion depth deviation by special guard ring arrangement.
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面向CMOS工艺兼容的1200V级器件亚微米结终端
本研究首次证明了亚微米尺度下极浅结终止的可能性。2D-TCAD模拟显示,即使是0.2μm结深结构也能够阻挡1200V的电压,并且可用于具有超过200个保护环的功率器件。极浅结构通过特殊的保护环布置,对扩散深度偏差具有稳健性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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