{"title":"The evolution of DSP architectures: towards parallelism exploitation","authors":"R. Sernec, M. Zajc, J. Tasic","doi":"10.1109/MELCON.2000.880050","DOIUrl":null,"url":null,"abstract":"This paper presents a path of parallelism exploitation in commercial programmable DSP processors. DSP processors have gained in their complexity and have adopted some very sophisticated parallelism extraction techniques, namely very long instruction word (VLIW) and SIMD designs. The intention is to show a development path of digital signal processors (DSP) and focuses on their features that allow parallel processing of algorithms.","PeriodicalId":151424,"journal":{"name":"2000 10th Mediterranean Electrotechnical Conference. Information Technology and Electrotechnology for the Mediterranean Countries. Proceedings. MeleCon 2000 (Cat. No.00CH37099)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 10th Mediterranean Electrotechnical Conference. Information Technology and Electrotechnology for the Mediterranean Countries. Proceedings. MeleCon 2000 (Cat. No.00CH37099)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MELCON.2000.880050","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
This paper presents a path of parallelism exploitation in commercial programmable DSP processors. DSP processors have gained in their complexity and have adopted some very sophisticated parallelism extraction techniques, namely very long instruction word (VLIW) and SIMD designs. The intention is to show a development path of digital signal processors (DSP) and focuses on their features that allow parallel processing of algorithms.
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