{"title":"HPS, a new microarchitecture: rationale and introduction","authors":"Y. Patt, Wen-mei W. Hwu, M. Shebanow","doi":"10.1145/18927.18916","DOIUrl":null,"url":null,"abstract":"HPS (High Performance Substrate) is a new microarchitecture targeted for implementing very high performance computing engines. Our model of execution is a restriction on fine granularity data flow. This paper introduces the model, provides the rationale for its selection, and describes the data path and flow of instructions through the microengine.","PeriodicalId":221754,"journal":{"name":"MICRO 18","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1985-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"149","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"MICRO 18","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/18927.18916","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 149
Abstract
HPS (High Performance Substrate) is a new microarchitecture targeted for implementing very high performance computing engines. Our model of execution is a restriction on fine granularity data flow. This paper introduces the model, provides the rationale for its selection, and describes the data path and flow of instructions through the microengine.