HPS, a new microarchitecture: rationale and introduction

MICRO 18 Pub Date : 1985-12-01 DOI:10.1145/18927.18916
Y. Patt, Wen-mei W. Hwu, M. Shebanow
{"title":"HPS, a new microarchitecture: rationale and introduction","authors":"Y. Patt, Wen-mei W. Hwu, M. Shebanow","doi":"10.1145/18927.18916","DOIUrl":null,"url":null,"abstract":"HPS (High Performance Substrate) is a new microarchitecture targeted for implementing very high performance computing engines. Our model of execution is a restriction on fine granularity data flow. This paper introduces the model, provides the rationale for its selection, and describes the data path and flow of instructions through the microengine.","PeriodicalId":221754,"journal":{"name":"MICRO 18","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1985-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"149","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"MICRO 18","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/18927.18916","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 149

Abstract

HPS (High Performance Substrate) is a new microarchitecture targeted for implementing very high performance computing engines. Our model of execution is a restriction on fine granularity data flow. This paper introduces the model, provides the rationale for its selection, and describes the data path and flow of instructions through the microengine.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
HPS,一种新的微体系结构:基本原理和介绍
高性能基板(High Performance Substrate, HPS)是一种新的微体系结构,旨在实现高性能计算引擎。我们的执行模型是对细粒度数据流的限制。本文介绍了该模型,给出了其选择的基本原理,并描述了该微引擎的数据路径和指令流程。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Efficient hardware for multiway jumps and pre-fetches Some experiments in global microcode compaction Microcode development for microprogrammed processors The design of an interactive compiler for optimizing microprograms Target-independent high-level microprogramming
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1