{"title":"Design considerations for optically connected systems on chip","authors":"N. Bambha, S. Bhattacharyya, G. Euliss","doi":"10.1109/IWSOC.2003.1213052","DOIUrl":null,"url":null,"abstract":"This paper addresses some fundamental issues relating to the design of systems on chip that utilize optical interconnects. We present an information theoretical model for assessing trade-offs between global and local partitions in these systems, and evaluate interconnect topology synthesis and application mapping techniques for digital signal processing (DSP) applications in these systems.","PeriodicalId":259178,"journal":{"name":"The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings.","volume":"83 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-07-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWSOC.2003.1213052","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
This paper addresses some fundamental issues relating to the design of systems on chip that utilize optical interconnects. We present an information theoretical model for assessing trade-offs between global and local partitions in these systems, and evaluate interconnect topology synthesis and application mapping techniques for digital signal processing (DSP) applications in these systems.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
