On reducing aliasing effects and improving diagnosis of logic bist failures

Abstract

Diagnosing failing vectors in a Built-Zn Self Test (BZST) environment is a dificult task because of the highly compressed signature coming out of the Multiple Input Shift Register (MISR). The root cause of the failure must be initially narrowed down to the failing vectors and also the scan cells at which mismatches occurred. In this work, we propose a method for accurately determining the first cycle at which incorrect responses were captured in the scan chains along with the scan cells that captured the incorrect responses. We define a diagnosis methodology that describes a simple way of diagnosing one chain at a time and jLrther shows that accurate diagnosis is possible with the aliasing nature of the MISR having no impact on diagnosis. The proposed technique results in identibing the failing vectors along with the mismatching scan cells. After determining the failing vectors and mismatching scan cells, we extend the method to identifj, potential faults in the circuit that may have resulted in the scan cells capturing incorrect responses. The method presented in this paper can be applied to diagnose multiple failing vectors also.