A direct conversion WLAN receiver

Jingguang Wang, Jinju Wang, Yumei Huang, Weilun Shen, Xiaofeng Yi, Zhiliang Hong
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引用次数: 3

Abstract

A direct conversion receiver for WLAN 802.11b is presented in 0.18/spl mu/m CMOS technology. It contains a complete receiver chain with low noise amplifier, I/Q mixer, programmable gain amplifier and base band filter. A 4.8GHz divider is used to generate 2.4GHz quadrature clock for I/Q mixer. The reception path is dc coupled and a feed back low pass filter is added to reduce the dc-offset and 1/f noise. The noise figure of receiver is 5.2dB, the IIP3 is -14.5dBm at high gain setting. With the supply voltage of 1.8V, the over all power consummation is about 100mW. The chip area with pads is 2.6mm/spl times/2.5mm.
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一种直接转换的WLAN接收机
提出了一种用于WLAN 802.11b的直接转换接收机,采用0.18/spl mu/m CMOS技术。它包含一个完整的接收器链,包括低噪声放大器、I/Q混频器、可编程增益放大器和基带滤波器。采用4.8GHz分频器产生2.4GHz正交时钟,用于I/Q混频器。接收路径是直流耦合的,并添加了一个反馈低通滤波器以减少直流偏移和1/f噪声。接收机噪声系数为5.2dB,高增益设置下IIP3为-14.5dBm。电源电压为1.8V,整机功耗约100mW。带衬垫的芯片面积为2.6mm/spl次/2.5mm。
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