A new communication mechanism for multi-core systems in industrial design

Abstract

In industrial design, multi-core systems are receiving more and more attention for their special characteristics as low power consumption, reliability and extensibility. Multi-core processors are usually designed in shared memory architecture and tasks on different cores run concurrently. The communication between tasks must be performed consistently, which means the access to shared communication buffer (or resource) should be atomic. Many mechanisms have been proposed for this purpose, e.g. wait-free and lock-based. However, different mechanisms show different performance on system schedulability and memory overhead. So, it would be a good choice to combine these mechanisms together, i.e. to protect different resources with different mechanisms. This is a variation of bin-packing problem, which is NP-complete. We propose a heuristic algorithm to select the communication mechanisms with minimum memory requirements executing within the time constraints. The experiment demonstrates that the heuristic provides close to optimal solutions and the proposed algorithm can significantly reduce the memory consumption of wait-free method, guaranteeing that all tasks complete before their deadlines.