A low spurious 14.4mW 1.8GHz CMOS FVC-based clock generator for portable SoC processors

Gil-Su Kim, Chulwoo Kim, Soo-Won Kim
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Abstract

A 60 MHz to 1.8 GHz frequency-to-voltage converter (FVC)-based clock generator is fabricated in a 0.18-mum CMOS process for portable SoC processors. The clock generator employs the FVC and a VCO to reduce power and jitter simultaneously, which achieves spurious tone of -54.1 dBc, rms jitter of 1.497 ps and peak-to-peak jitter of 14.4 mW at 1.8 V supply.
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用于便携式SoC处理器的低杂散14.4mW 1.8GHz CMOS fvc时钟发生器
基于频率电压转换器(FVC)的60 MHz至1.8 GHz时钟发生器采用0.18 μ m CMOS工艺制造,用于便携式SoC处理器。时钟发生器采用FVC和VCO同时降低功率和抖动,在1.8 V电源下实现了-54.1 dBc的杂散音、1.497 ps的有效值抖动和14.4 mW的峰对峰抖动。
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