Energy-Efficient Application Mapping in FPGA through Computation in Embedded Memory Blocks

Abstract

FPGAs have emerged as the preferred prototyping and accelerator platform for diverse application domains such as digital signal processing (DSP), security and multimedia, which often impose real-time performance requirements. Most applications in these domains require efficient implementation of complex data paths or functions, e.g. transcendental functions which are spatially mapped in the configurable logic or embedded DSP blocks of a FPGA device. Requirement of elaborate computational resources to realize these operations impose a major barrier to energy efficiency. In this paper, we propose to use embedded memory blocks in FPGA for computing to significantly improve energy efficiency of the applications which are dominated by complex data paths and/or functions. Complex operations are decomposed into large multi-input/output lookup tables (LUTs); mapped to embedded memory blocks and evaluated through memory access over single or multiple cycles. Different parts of an application are selectively mapped into memory or logic/DSP blocks in a heterogeneous mapping framework to maximize energy efficiency. We explore optimal energy configuration of embedded memory for mapping applications of varying input size and develop a complete mapping flow including decomposition, fusion and packing. Effectiveness of the proposed flow is evaluated using a commercial state-of-the-art FPGA system (Altera Stratix IV device). Finally the proposed framework is used to drastically trade-off energy vs accuracy at run-time for common signal processing applications.