B. Young, K. Reddy, Sachin Rao, A. Elshazly, Tejasvi Anand, P. Hanumolu
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引用次数: 27
Abstract
A wide bandwidth, high sample rate 3rd order continuous-time ΔΣ modulator using VCO-based integrators is presented. Non-idealities caused by VCOs at the modulator frontend are addressed using both circuit- and architecture-level techniques. Fabricated in 65 nm CMOS, the prototype modulator operates at 1.28 GS/s and achieves a dynamic range of 75 dB, SNR of 71 dB in 50 MHz bandwidth, while consuming 38 mW of total power.
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