{"title":"Thermal performance evaluation of VLSI packaging","authors":"Z.J. Staszak, J. Prince, B. R. Simon","doi":"10.1109/CMPEUR.1989.93503","DOIUrl":null,"url":null,"abstract":"The authors address the problems of thermal performance evaluation of level-1 (chip and carrier) and level-2 (boards/modules and interconnects) integrated-circuit packages. Requirements for thermal modeling and experimental characterization are outlined. Models, simulation tools, and characterization tools and their assessment are discussed.<<ETX>>","PeriodicalId":304457,"journal":{"name":"Proceedings. VLSI and Computer Peripherals. COMPEURO 89","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-05-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. VLSI and Computer Peripherals. COMPEURO 89","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CMPEUR.1989.93503","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The authors address the problems of thermal performance evaluation of level-1 (chip and carrier) and level-2 (boards/modules and interconnects) integrated-circuit packages. Requirements for thermal modeling and experimental characterization are outlined. Models, simulation tools, and characterization tools and their assessment are discussed.<>
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