A Procedural Generator for the Sizing and Physical Synthesis of a MOSFET Low-Side Driver

Abstract

A flow is presented to build procedural generators for analog integrated circuits at the transistor level. It includes procedural schematic sizing, design centering, layout generation, and post-layout verification. The procedures for front and backend generation are jointly constructed to make use of the same set of design parameters and geometric constraints. The flow is used to write a generator for the MOSFET low-side driver of a dcdc boost converter. Physical layout area, electrical performance, and design effort are comparable to the results of a conventional manual design of the same circuit. The real benefit is in generator reuse following changes in the specifications or technology.