Board level interconnect risk assessment in spherical bend

Abstract

A modeling based methodology for prediction of the performance of board level interconnects of Ball Grid Array (BGA) components in board flexure tests is presented. Detailed work has been done to comprehend the physics of the problem so that sound theoretical framework is employed. A step-by-step validation of the developed computational model is conducted using a set of carefully designed tests. The model reproduces extremely well all the mechanical parameters measured in testing. The validated model is utilized to understand the impact of various package and board design parameters on BGA performance and risk. The developed modeling methodology is a key part in achieving the larger objective of replacing costly and time-consuming board flexure tests with modeling for BGA risk assessment. This methodology will also be a key enabler in providing comprehensive guidance to customers for board-level performance of Intel BGA components in manufacturing, assembly and test.