{"title":"PS-BloTAM: Pre-sampling based architecture-level temperature analysis methodology","authors":"Tian Zou, Zuying Luo","doi":"10.1109/ASICON.2015.7517167","DOIUrl":null,"url":null,"abstract":"Efficient Thermal Analysis (TA) plays a crucial role in temperature-aware floorplanning design and Dynamic Power and Temperature Management (DPTM) for Multi-Processor System-on-Chip(MPSoC). To accelerate temperature-aware floorplanning with fixed die area and unchanged heat dissipation system, this work proposes a novel architecture-level TA method PS-BloTAM. It first uses HotSpot to build the pre-sampling thermal resistance (TR) matrix S with a sampling block array. Then, according to size and position of modules in the given floorplanning solution, PS-BloTAM analytically computes this given floorplan's TR matrix R with S. Finally temperatures of modules in different working modes can be easily estimated with previous R. Adopting traditional idea of design library, PS-BloTAM is able to efficiently compute temperature distributions of numerous floor-plans. Experiments show that comparing with HotSpot, PS-BloTAM achieves 43X speedup with average and maximum errors less than 1.65% and 6.64% respectively.","PeriodicalId":382098,"journal":{"name":"International Conference on ASIC","volume":"73 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Conference on ASIC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASICON.2015.7517167","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Efficient Thermal Analysis (TA) plays a crucial role in temperature-aware floorplanning design and Dynamic Power and Temperature Management (DPTM) for Multi-Processor System-on-Chip(MPSoC). To accelerate temperature-aware floorplanning with fixed die area and unchanged heat dissipation system, this work proposes a novel architecture-level TA method PS-BloTAM. It first uses HotSpot to build the pre-sampling thermal resistance (TR) matrix S with a sampling block array. Then, according to size and position of modules in the given floorplanning solution, PS-BloTAM analytically computes this given floorplan's TR matrix R with S. Finally temperatures of modules in different working modes can be easily estimated with previous R. Adopting traditional idea of design library, PS-BloTAM is able to efficiently compute temperature distributions of numerous floor-plans. Experiments show that comparing with HotSpot, PS-BloTAM achieves 43X speedup with average and maximum errors less than 1.65% and 6.64% respectively.