{"title":"Self-repairable EPLDs: design, self-repair, and evaluation methodology","authors":"Chong H. Lee, M. Perkowski, D. Hall, David S. Jun","doi":"10.1109/EH.2000.869356","DOIUrl":null,"url":null,"abstract":"This paper describes the concept of self-testable and self-repairable EPLDs (Electrically Programmable Logic Devices) for high security and safety applications. A design methodology is proposed for self-repairing of a GAL (Generic Array Logic) which is a kind of EPLD. Our fault-locating and fault-repairing architecture uses universal test sets, fault-detecting logic, and self-repairing circuits with spare devices. The design method allows to detect, diagnose, and repair all multiple stuck-at faults which might occur on E/sup 2/CMOS cells in programmable AND plane. A \"column replacement\" method with extra columns is introduced that discards each faulty column entirely and replaces it with an extra column. The evaluation methodology proves that the self-repairable GAL will last longer in the field.","PeriodicalId":432338,"journal":{"name":"Proceedings. The Second NASA/DoD Workshop on Evolvable Hardware","volume":"49 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-07-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. The Second NASA/DoD Workshop on Evolvable Hardware","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EH.2000.869356","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
This paper describes the concept of self-testable and self-repairable EPLDs (Electrically Programmable Logic Devices) for high security and safety applications. A design methodology is proposed for self-repairing of a GAL (Generic Array Logic) which is a kind of EPLD. Our fault-locating and fault-repairing architecture uses universal test sets, fault-detecting logic, and self-repairing circuits with spare devices. The design method allows to detect, diagnose, and repair all multiple stuck-at faults which might occur on E/sup 2/CMOS cells in programmable AND plane. A "column replacement" method with extra columns is introduced that discards each faulty column entirely and replaces it with an extra column. The evaluation methodology proves that the self-repairable GAL will last longer in the field.