A trace signal selection algorithm for improved post-silicon debug

Abstract

Enhancing observability is a key challenge in post-silicon validation. On-chip trace buffers store real time data which can be used for analyzing and debugging. Appropriate selection of these signals is crucial for storing useful debug data. This paper proposes a methodology for identifying trace signals so as to maximize detection of erroneous behavior of the failing chip which helps in improving quality of information available for debugging. Different quantitative measures are proposed to assess utility of debug data. Experimental results on benchmark circuits indicate that the methodology is useful for selecting trace signals which maximize debug data effectiveness.