A comparative survey of approximate adders

Abstract

The gap between capabilities of CMOS technology scaling and requirements of future application workloads is increasing rapidly. There are several promising design approaches that jointly can reduce this gap significantly. Approximate computing is one of them and in recent years, has attracted the strongest attention of the scientific community. Approximate computing exploits inherent error-resilience of applications and features high-performance energy-efficient software and hardware implementations by trading-off computational quality (e.g., accuracy) for computational efforts (e.g., performance and energy). Over the decade, several research efforts have explored approximate computing throughout all the layers of computing stack, however, most of the work at hardware level of abstraction has been proposed on adders. In this paper, we first explain briefly - why approximate adders have attracted the strongest attention? We then provide a comparative survey of state-of-the-art approximate adders. We provide comparison based on both conventional design metrics as well as approximate computing design metrics.