Design and hardware implementation of a low complexity MIMO OFDM system

B. Kamdar, D. Shah, S. Sorathia, Y. S. Rao
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引用次数: 4

Abstract

This paper describes a design and implementation of a baseband Orthogonal Frequency Division Multiplexing (OFDM) transceiver utilizing Multiple Input Multiple Output (MIMO) signal processing for increased data rate. MIMO OFDM has many promising features which allow wireless devices to communicate at a higher data rate with reduced errors and hardware complexity. The system is composed of a 2×2 MIMO utilizing Vertical-Bell Laboratories Layered Space-Time (V-BLAST) detection algorithm. Alternate designs for modulator-demodulator, convolutional encoder - decoder and sync circuit are considered to get optimum resource utilization and low complexity. The design is implemented on a Spartan 6 FPGA and resource utilization with various combinations is compared to get an optimum design in terms of hardware footprint.
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一种低复杂度MIMO OFDM系统的设计与硬件实现
本文介绍了一种利用多输入多输出(MIMO)信号处理来提高数据速率的基带正交频分复用(OFDM)收发器的设计和实现。MIMO OFDM有许多有前途的特性,允许无线设备以更高的数据速率通信,减少错误和硬件复杂性。该系统由2×2 MIMO组成,采用垂直贝尔实验室分层时空(V-BLAST)检测算法。考虑了调制器-解调器、卷积编码器-解码器和同步电路的交替设计,以获得最佳的资源利用率和低复杂度。该设计在Spartan 6 FPGA上实现,并比较了各种组合的资源利用率,以获得硬件占用空间方面的最佳设计。
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