{"title":"Design and hardware implementation of a low complexity MIMO OFDM system","authors":"B. Kamdar, D. Shah, S. Sorathia, Y. S. Rao","doi":"10.1109/ICCICT.2012.6398103","DOIUrl":null,"url":null,"abstract":"This paper describes a design and implementation of a baseband Orthogonal Frequency Division Multiplexing (OFDM) transceiver utilizing Multiple Input Multiple Output (MIMO) signal processing for increased data rate. MIMO OFDM has many promising features which allow wireless devices to communicate at a higher data rate with reduced errors and hardware complexity. The system is composed of a 2×2 MIMO utilizing Vertical-Bell Laboratories Layered Space-Time (V-BLAST) detection algorithm. Alternate designs for modulator-demodulator, convolutional encoder - decoder and sync circuit are considered to get optimum resource utilization and low complexity. The design is implemented on a Spartan 6 FPGA and resource utilization with various combinations is compared to get an optimum design in terms of hardware footprint.","PeriodicalId":319467,"journal":{"name":"2012 International Conference on Communication, Information & Computing Technology (ICCICT)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-12-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 International Conference on Communication, Information & Computing Technology (ICCICT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCICT.2012.6398103","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
This paper describes a design and implementation of a baseband Orthogonal Frequency Division Multiplexing (OFDM) transceiver utilizing Multiple Input Multiple Output (MIMO) signal processing for increased data rate. MIMO OFDM has many promising features which allow wireless devices to communicate at a higher data rate with reduced errors and hardware complexity. The system is composed of a 2×2 MIMO utilizing Vertical-Bell Laboratories Layered Space-Time (V-BLAST) detection algorithm. Alternate designs for modulator-demodulator, convolutional encoder - decoder and sync circuit are considered to get optimum resource utilization and low complexity. The design is implemented on a Spartan 6 FPGA and resource utilization with various combinations is compared to get an optimum design in terms of hardware footprint.