{"title":"IFSys: an integrated framework for system-level synthesis","authors":"J. Deang, G. McNally, D. Siewiorek","doi":"10.1109/IWV.1998.667106","DOIUrl":null,"url":null,"abstract":"IFSys is an integrated system-level synthesis framework which allows a complete computer system to be specified using a set of high-level building blocks rather than behavioral level specifications. By reusing domain-specific design knowledge, alternative hardware and software configurations can be rapidly specified and synthesized. Thirty-two different embedded computer systems were synthesized using IFSys which spanned a factor of 1.5 in cost, 1.2 in power 2.2 in area, 1.5 in program size, and 21 in performance.","PeriodicalId":185325,"journal":{"name":"Proceedings IEEE Computer Society Workshop on VLSI'98 System Level Design (Cat. No.98EX158)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings IEEE Computer Society Workshop on VLSI'98 System Level Design (Cat. No.98EX158)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWV.1998.667106","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
IFSys is an integrated system-level synthesis framework which allows a complete computer system to be specified using a set of high-level building blocks rather than behavioral level specifications. By reusing domain-specific design knowledge, alternative hardware and software configurations can be rapidly specified and synthesized. Thirty-two different embedded computer systems were synthesized using IFSys which spanned a factor of 1.5 in cost, 1.2 in power 2.2 in area, 1.5 in program size, and 21 in performance.
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