Notice of Violation of IEEE Publication PrinciplesA Dual Channel DVB-S/S2 Direct-Conversion Satellite TV Tuner with On-Chip ADCs and Multiple DC Offset Cancellation Loops
{"title":"Notice of Violation of IEEE Publication PrinciplesA Dual Channel DVB-S/S2 Direct-Conversion Satellite TV Tuner with On-Chip ADCs and Multiple DC Offset Cancellation Loops","authors":"A. Maxim, C. Turinici, M. Gheorge","doi":"10.1109/SMIC.2008.8","DOIUrl":null,"url":null,"abstract":"This paper proposes a dual channel satellite TV receiver using an alternative partition into a front-end RF-todigital tuner that includes the baseband ADC converters and a digital-only demodulator-on-host, resulting in a low cost and a good isolation between the analog front-end and the digital backend. The die area was significantly reduced by replacing the multi-oscillator solution used at present with a single high frequency Colpitts oscillator, followed by a ratiometric frequency divider that generates the local oscillator signals for the entire satellite TV L-band. VCO pulling was reduced by having a larger frequency offset between the two PLLs, while the ADC spurs were avoided by performing a dynamic clock frequency management. The DC offset cancellation loop capacitors were integrated onchip by combining a multiple loop architecture with Miller capacitance multiplication. Tuner specifications include: -85dBm sensitivity, <7dB noise figure, +26dBm IIP3 at minimum gain,<0.7° total integrated phase noise, 24mm2 die area and 2W power from a 3.3V supply in dual channel reception mode.","PeriodicalId":350325,"journal":{"name":"2008 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMIC.2008.8","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper proposes a dual channel satellite TV receiver using an alternative partition into a front-end RF-todigital tuner that includes the baseband ADC converters and a digital-only demodulator-on-host, resulting in a low cost and a good isolation between the analog front-end and the digital backend. The die area was significantly reduced by replacing the multi-oscillator solution used at present with a single high frequency Colpitts oscillator, followed by a ratiometric frequency divider that generates the local oscillator signals for the entire satellite TV L-band. VCO pulling was reduced by having a larger frequency offset between the two PLLs, while the ADC spurs were avoided by performing a dynamic clock frequency management. The DC offset cancellation loop capacitors were integrated onchip by combining a multiple loop architecture with Miller capacitance multiplication. Tuner specifications include: -85dBm sensitivity, <7dB noise figure, +26dBm IIP3 at minimum gain,<0.7° total integrated phase noise, 24mm2 die area and 2W power from a 3.3V supply in dual channel reception mode.