Feasible Assignment of Micro-Bumps in 3D ICs

Abstract

For the signal connections between two adjacent dies in 3D ICs, the redistributed layers (RDLs) routing from IO pads to micro-bumps plays an important role. In this paper, given a set of nets on the upper and lower RDLs between two adjacent dies, based on the separation of one 2-pin net on the upper and lower RDLs using one micro-bump, an efficient two-phase algorithm can be proposed to assign feasible micro-bumps onto the nets to minimize the overlapping degree and the X-type intersections on the routing regions for single-layer RDL routing. Compared with Kuan’s algorithm and Yan’s algorithm in the micro-bump assignment for single-layer RDL routing, the experimental results show that our proposed algorithm can use less CPU time to assign feasible micro-bumps onto the given nets and obtain 100% routability with shorter wirelength in 5 tested examples.